Design and Implementation of MIMO-OFDM us-ing Encoding and Decoding techniques on FPGA

In this paper, we present a memory-efficient and faster convolution encoding and adaptive viterbi decoding implementation technique for MIMO-OFDM communication systems on FPGA. A method for the 1/3 convloution encoder and Modified viterbi decoder design used for coding techniques on FPGA. Our design utilizes the minimum required on-chip memory for the MIMO-OFDM implementation. Using the proposed design method, the I/O rate for MIMO-OFDM based communication systems are doubled for 2×2 MIMO systems. The whole design is implemented using Xilinx ISE 13.4 using VERILOG on Vitrex 5 FPGA and simulated using Modelsim 6.3f.